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8620 pcplusmp shouldn't support x2APIC mode
Reviewed by: Robert Mustacchi <rm@joyent.com>
Reviewed by: Jerry Jelinek <jerry.jelinek@joyent.com>

@@ -18,12 +18,12 @@
  *
  * CDDL HEADER END
  */
 /*
  * Copyright (c) 1993, 2010, Oracle and/or its affiliates. All rights reserved.
+ * Copyright 2017 Joyent, Inc.
  */
-
 /*
  * Copyright (c) 2010, Intel Corporation.
  * All rights reserved.
  */
 

@@ -115,10 +115,13 @@
 
 /* General x2APIC constants used at various places */
 #define APIC_SVR_SUPPRESS_BROADCAST_EOI         0x1000
 #define APIC_DIRECTED_EOI_BIT                   0x1000000
 
+/* x2APIC enable bit in REG_APIC_BASE_MSR */
+#define X2APIC_ENABLE_BIT       10
+
 /* IRR register */
 #define APIC_IRR_REG            0x80
 
 /* ISR register */
 #define APIC_ISR_REG            0x40

@@ -865,10 +868,11 @@
 extern int apic_multi_msi_enable;
 extern int apic_sci_vect;
 extern int apic_hpet_vect;
 extern uchar_t apic_ipls[];
 extern apic_reg_ops_t *apic_reg_ops;
+extern apic_reg_ops_t local_apic_regs_ops;
 extern apic_mode_t apic_mode;
 extern void x2apic_update_psm();
 extern void apic_change_ops();
 extern void apic_common_send_ipi(int, int);
 extern void apic_set_directed_EOI_handler();