4 * You may only use this file in accordance with the terms of version
5 * 1.0 of the CDDL.
6 *
7 * A full copy of the text of the CDDL should have accompanied this
8 * source. A copy of the CDDL is also available via the Internet at
9 * http://www.illumos.org/license/CDDL.
10 */
11
12 /*
13 * Copyright 2016 Nexenta Systems, Inc. All rights reserved.
14 * Copyright 2016 The MathWorks, Inc. All rights reserved.
15 */
16
17 #ifndef _NVME_VAR_H
18 #define _NVME_VAR_H
19
20 #include <sys/ddi.h>
21 #include <sys/sunddi.h>
22 #include <sys/blkdev.h>
23 #include <sys/taskq_impl.h>
24
25 /*
26 * NVMe driver state
27 */
28
29 #ifdef __cplusplus
30 extern "C" {
31 #endif
32
33 #define NVME_FMA_INIT 0x1
34 #define NVME_REGS_MAPPED 0x2
35 #define NVME_ADMIN_QUEUE 0x4
36 #define NVME_CTRL_LIMITS 0x8
37 #define NVME_INTERRUPTS 0x10
38
39 #define NVME_MIN_ADMIN_QUEUE_LEN 16
40 #define NVME_MIN_IO_QUEUE_LEN 16
41 #define NVME_DEFAULT_ADMIN_QUEUE_LEN 256
42 #define NVME_DEFAULT_IO_QUEUE_LEN 1024
43 #define NVME_DEFAULT_ASYNC_EVENT_LIMIT 10
53 typedef struct nvme_qpair nvme_qpair_t;
54 typedef struct nvme_task_arg nvme_task_arg_t;
55
56 struct nvme_minor_state {
57 kmutex_t nm_mutex;
58 boolean_t nm_oexcl;
59 uint_t nm_ocnt;
60 };
61
62 struct nvme_dma {
63 ddi_dma_handle_t nd_dmah;
64 ddi_acc_handle_t nd_acch;
65 ddi_dma_cookie_t nd_cookie;
66 uint_t nd_ncookie;
67 caddr_t nd_memp;
68 size_t nd_len;
69 boolean_t nd_cached;
70 };
71
72 struct nvme_cmd {
73 nvme_sqe_t nc_sqe;
74 nvme_cqe_t nc_cqe;
75
76 void (*nc_callback)(void *);
77 bd_xfer_t *nc_xfer;
78 boolean_t nc_completed;
79 boolean_t nc_dontpanic;
80 uint16_t nc_sqid;
81
82 nvme_dma_t *nc_dma;
83
84 kmutex_t nc_mutex;
85 kcondvar_t nc_cv;
86
87 taskq_ent_t nc_tqent;
88 nvme_t *nc_nvme;
89 };
90
91 struct nvme_qpair {
92 size_t nq_nentry;
142 uint16_t n_async_event_limit;
143 uint_t n_min_block_size;
144 uint16_t n_abort_command_limit;
145 uint64_t n_max_data_transfer_size;
146 boolean_t n_write_cache_present;
147 boolean_t n_write_cache_enabled;
148 int n_error_log_len;
149 boolean_t n_lba_range_supported;
150 boolean_t n_auto_pst_supported;
151
152 int n_nssr_supported;
153 int n_doorbell_stride;
154 int n_timeout;
155 int n_arbitration_mechanisms;
156 int n_cont_queues_reqd;
157 int n_max_queue_entries;
158 int n_pageshift;
159 int n_pagesize;
160
161 int n_namespace_count;
162 int n_ioq_count;
163
164 nvme_identify_ctrl_t *n_idctl;
165
166 nvme_qpair_t *n_adminq;
167 nvme_qpair_t **n_ioq;
168
169 nvme_namespace_t *n_ns;
170
171 ddi_dma_attr_t n_queue_dma_attr;
172 ddi_dma_attr_t n_prp_dma_attr;
173 ddi_dma_attr_t n_sgl_dma_attr;
174 ddi_device_acc_attr_t n_reg_acc_attr;
175 ddi_iblock_cookie_t n_fm_ibc;
176 int n_fm_cap;
177
178 ksema_t n_abort_sema;
179
180 ddi_taskq_t *n_cmd_taskq;
181
182 /* state for devctl minor node */
|
4 * You may only use this file in accordance with the terms of version
5 * 1.0 of the CDDL.
6 *
7 * A full copy of the text of the CDDL should have accompanied this
8 * source. A copy of the CDDL is also available via the Internet at
9 * http://www.illumos.org/license/CDDL.
10 */
11
12 /*
13 * Copyright 2016 Nexenta Systems, Inc. All rights reserved.
14 * Copyright 2016 The MathWorks, Inc. All rights reserved.
15 */
16
17 #ifndef _NVME_VAR_H
18 #define _NVME_VAR_H
19
20 #include <sys/ddi.h>
21 #include <sys/sunddi.h>
22 #include <sys/blkdev.h>
23 #include <sys/taskq_impl.h>
24 #include <sys/list.h>
25
26 /*
27 * NVMe driver state
28 */
29
30 #ifdef __cplusplus
31 extern "C" {
32 #endif
33
34 #define NVME_FMA_INIT 0x1
35 #define NVME_REGS_MAPPED 0x2
36 #define NVME_ADMIN_QUEUE 0x4
37 #define NVME_CTRL_LIMITS 0x8
38 #define NVME_INTERRUPTS 0x10
39
40 #define NVME_MIN_ADMIN_QUEUE_LEN 16
41 #define NVME_MIN_IO_QUEUE_LEN 16
42 #define NVME_DEFAULT_ADMIN_QUEUE_LEN 256
43 #define NVME_DEFAULT_IO_QUEUE_LEN 1024
44 #define NVME_DEFAULT_ASYNC_EVENT_LIMIT 10
54 typedef struct nvme_qpair nvme_qpair_t;
55 typedef struct nvme_task_arg nvme_task_arg_t;
56
57 struct nvme_minor_state {
58 kmutex_t nm_mutex;
59 boolean_t nm_oexcl;
60 uint_t nm_ocnt;
61 };
62
63 struct nvme_dma {
64 ddi_dma_handle_t nd_dmah;
65 ddi_acc_handle_t nd_acch;
66 ddi_dma_cookie_t nd_cookie;
67 uint_t nd_ncookie;
68 caddr_t nd_memp;
69 size_t nd_len;
70 boolean_t nd_cached;
71 };
72
73 struct nvme_cmd {
74 struct list_node nc_list;
75
76 nvme_sqe_t nc_sqe;
77 nvme_cqe_t nc_cqe;
78
79 void (*nc_callback)(void *);
80 bd_xfer_t *nc_xfer;
81 boolean_t nc_completed;
82 boolean_t nc_dontpanic;
83 uint16_t nc_sqid;
84
85 nvme_dma_t *nc_dma;
86
87 kmutex_t nc_mutex;
88 kcondvar_t nc_cv;
89
90 taskq_ent_t nc_tqent;
91 nvme_t *nc_nvme;
92 };
93
94 struct nvme_qpair {
95 size_t nq_nentry;
145 uint16_t n_async_event_limit;
146 uint_t n_min_block_size;
147 uint16_t n_abort_command_limit;
148 uint64_t n_max_data_transfer_size;
149 boolean_t n_write_cache_present;
150 boolean_t n_write_cache_enabled;
151 int n_error_log_len;
152 boolean_t n_lba_range_supported;
153 boolean_t n_auto_pst_supported;
154
155 int n_nssr_supported;
156 int n_doorbell_stride;
157 int n_timeout;
158 int n_arbitration_mechanisms;
159 int n_cont_queues_reqd;
160 int n_max_queue_entries;
161 int n_pageshift;
162 int n_pagesize;
163
164 int n_namespace_count;
165 uint16_t n_ioq_count;
166
167 nvme_identify_ctrl_t *n_idctl;
168
169 nvme_qpair_t *n_adminq;
170 nvme_qpair_t **n_ioq;
171
172 nvme_namespace_t *n_ns;
173
174 ddi_dma_attr_t n_queue_dma_attr;
175 ddi_dma_attr_t n_prp_dma_attr;
176 ddi_dma_attr_t n_sgl_dma_attr;
177 ddi_device_acc_attr_t n_reg_acc_attr;
178 ddi_iblock_cookie_t n_fm_ibc;
179 int n_fm_cap;
180
181 ksema_t n_abort_sema;
182
183 ddi_taskq_t *n_cmd_taskq;
184
185 /* state for devctl minor node */
|